This invention relates to a semiconductor memory device and, more particularly, to a nonvolatile semiconductor memory device such as an EEPROM and an EPROM.
The nonvolatile semiconductor device is usually made in the form of an LSI device comprising a semiconductor chip and a number of memory cells formed on the chip. The degree of integration of this device has recently substantially increased. The device can preserve digital data for a predetermined period of time without consuming power. The data can be read from the device much faster than from a magnetic disk. Nonvolatile semiconductor devices such as an EEPROM and an EPROM can rewrite the stored data, and their utility is very high. The EEPROM and EPROM are different from each other in the method of erasing the data.
In the EEPROM, an electric control signal is used to erase the stored information. In the EPROM, ultraviolet rays are used for the same purpose. The EEPROM comprises memory cells each having a floating gate MOS transistor. The well-known floating gate MOS transistor for a EEPROM includes source and drain regions formed in the surface area of a semiconductor substrate. It also includes a channel region provided between the source and drain regions, a floating gate formed over the channel and drain region and insulated therefrom, and a control gate formed over the floating gate and insulated from this gate. The floating gate and control gate are wholly covered by an insulating layer. The floating gate and drain region are set apart for a distance shorter than the distance between the floating gate and channel region.
This floating gate MOS transistor stores a datum or bit determined by the amount of charge in the floating gate. The floating gate is charged or discharged under the control of the potential difference between the control gate and drain region. More specifically, according to the potential difference, a tunnel current flows through that portion of the insulating layer which is located between the floating gate and drain region, thereby charging or discharging the floating gate.
Heretofore, the bit stored in the floating gate MOS transistor is rewritten in the following way. First, an erasing voltage (e.g., of +15 V) is applied to the control gate. The floating gate is charged, thus erasing the bit. Then, a programming voltage (e.g., of +15 V) is applied to the drain region. The floating gate is discharged, thus writing new bit in the floating gate MOS transistor. It usually takes 100 .mu.sec. to 10 msec. to rewrite a bit of data.
Usually, in the EEPROM, the bits of data stored in memory cells forming one word memory (e.g. of 8 bits) are erased simultaneously, and subsequently new bit of "1" or "0" are written in each memory cell.
The prior art method of rewriting data, used with a high integration degree EEPROM, is disadvantageous in that the data-rewriting time increases in proportion to the storage capacity of the EEPROM. In the case of 256-KB EEPROM, tens of seconds to several minutes is required for renewing all the data.
In the EPROM, the stored data is erased by ultraviolet rays. The EPROM it is slightly different from the EEPROM in the structure of the floating gate MOS transistor. More specifically, the floating gate is formed over the channel region and insulated from this region. The gate is charged by the hot carriers generated in the channel region. With EPROM, it takes 100 .mu.sec. to 1 msec. to write one bit of data. The data-writing time increases in proportion to the storage capacity like the EEPROM.
Accordingly, it has been demanded that the data-writing time in the EEPROM and EPROM be reduced.